Page 310 - CITS - Electronic Mechanic - TT - 2024
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ELECTRONICS MECHANIC - CITS




           support ranging from the creation of project structure to the creation of user programs. The OS system is ac-
           cessed through a graphical user interface window ( also known as main window). The main window contains all
           the functions needed to set up a project , configure the hardware , write and test programs. User program can be
           written in any standard PLC programming language like ladder diagram or statement list While processing a PLC
           program, the CPU scans and executes the main program cyclically; A program scan cycle consists of sequential
           operations that include input scan, program scan, and output scan. In the input scan, the CPU updates the process
           image input table, in the output scan; the CPU updates the process image output table. After the completion of
           each scan cycle, the CPU returns to the beginning of the next cycle and again repeats the cycle. The time taken
           to scan one program is called scan-Cycle time.
           Addressing /programming  of plc
           Addressing:-
           Addressing is the most important concept to understand when learning PLCs. Addressing is how we make a cor-
           relation between the field devices controlled by the PLC, and the data that is stored in the PLCs memory. If you
           cannot address a point or group of points in the PLCs memory, then you cannot control the field device associated
           with that point. The easiest way to approach understanding the addressing used in the Allen Bradley PLC-5 is to
           view all addresses from the processors point of view. By this, we mean that in order for a real device in the field,
           such as a relay, to be operated by the PLC, the PLC must first have a record of that point in its memory. That point
           can then be accessed by the PLC.

           Chassis
           Hardware assembly (physical rack) that houses devices such as I/O modules, adapter modules, processor mod-
           ules, and power supplies. Chassis are available in six sizes: 4-, 8-, 12-, and 16-slot.Talk Page

           Group
           An I/O addressing unit consisting of one input and one output word (16 bits each) of the data table. Depending
           on the density of the I/O module and the addressing mode used, some of the bits in a group maybe unused. The
           group number is included in I/O addresses in the position represented with agin the format:I:rrg/xx.Talk Page
           Rack
            An I/O addressing unit that corresponds to eight input image table words and eight output image table words(8
           groups). A rack is a logical entity not to be confused with the physical chassis. 8 groups = 1 full rack, 6groups =
           rack, 4 groups = rack, 2 groups = rack. The rack number is included in I/O addresses in the position represented
           with an “rr” in the format: I:rrg/xx.Talk Page
           Slot
            A location in a chassis for installing a module. The number of physical slots per group determines the addressing
           mode.
           Elements
           Data files are made up of individual data blocks called “Elements” or “Structures”. Each element is composed of
           “words”, and each word is composed of “bits”. Elements are comprised of from 1 to 56 words, depending on the
           instruction. Most instructions you will encounter will have from one to three words to an element. An example of an
           element level address is T4:0T4:0 indicates the first timer (0) in the default timer file (T4). Each timer is comprised
           of three (3) 16 bit words. When you say T4:0, you are referring to all three of these words as a group.
           Rack Addressing Rules
           Addressing to a rack is just assigning a physical slot in the chassis to a logical word in the processor. Rack ad-
           dressing involves only data tables 0 and 1, the output and input data tables. The type of addressing shown is
           called Single slot addressing  and is the most common type of addressing used in Allen Bradley PLCs. To review
           the rules for rack addressing, use the following while referring to the previous figure on PLC 5 Racks.: A rack is a
           logical term that defines 8 words in the processor input data table and 8 words in the processor output data table.
           These words are numbered 0-7.Each logical rack can store 128 bits of information in its input rack and 128 bits
           in its output rack. (8words per rack x 16 bits per word=128 bits of data storage)In single slot addressing, each
           physical slot is addressed to one input word and also to one output word. This makes it possible to put either an
           Input module or an output module in any slot. The number of logical racks determines how many points a particu-
           lar model of PLC can address. This number is fixed for any particular processor and cannot be changed. Rack
           addressing is always in the format shown in Figure

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                                   CITS : E & H - Electronics Mechanic - Lesson 180 - 187
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